Introduction
The "Zefant LC3E" modules are low cost, yet versatile and easy to use FPGA modules. They offer most of the advantages of the larger Zefant modules, but can be plugged directly into standard breadboard PCBs, no high density connectors are required. Additionally they are particularly economically priced.They are based on Xilinx Spartan-3E FPGAs with 100,000 or 250,000 system gates and do also include power supply, SRAM and flash memory.
Hardware Description
The FPGA module contains the FPGA itself, SRAM, Intel StrataFlash, one or two oscillators, multiple power supplies, misc switches, buttons and LEDs, 3 board-to-board connectors and a JTAG connector:

Additionally a secure EEPROM (IC1001) can optionally be occupied and used as explained in Xilinx XAPP780 for copy protection.
The top side of the module looks like this:

The BTB connectors can be occupied on the bottom side (as shown on the photo), on the top side or not at all.
JTAG Chain
The JTAG chain only contains the Spartan-3E FPGA on this module, therefore it looks very simple:

Solder Bridges
Solder Bridge Descriptions
The module contains 5 solder bridges in total, all of which are located on the bottom PCB side. For simplicity they're also documented on the PCB:
| Solder Bridge | Signals | Description |
| SB301 | Pad 1: VCCIO0 Pad 2: VCC33 | Connect VCCIO0 to VCC33 |
| SB302 | Pad 1: VCCIO3 Pad 2: VCC33 | Select CPLD TDI from JTAG TDI or FPGA TDO |
| SB601 | Pad 1: GND Pad 2: OSC1 Disable | Disable OSC1 Set this to disable Oscillator 1 to save power if not required |
| SB602 | Pad 1: GND Pad 2: OSC2 Disable | Disable OSC2 Set this to disable Oscillator 2 to save power if not required |
| SB901 | Pad 1: 3.3V from internal LDO Pad 2: VCC33 | Generate VCC33 internally Set this to use the 3.3V from the internal LDO for VCC33. If removed, you can supply your own 3.3V source to the VCC33 pins and potentially save power dissipation. |
For identification pad #1 is larger than pad #2.
Default Solder Bridge Settings
By default the solder bridges are set as shown below. Both oscillators are enabled, all I/O banks and VCC33 are supplied internally:
| Solder Bridge | Default | Description |
| SB301 | Set | Supply 3.3V to FPGA bank 0 (VCCIO0) |
| SB302 | Set | Supply 3.3V to FPGA bank 3 (VCCIO3) |
| SB601 | Open | OSC1 enabled |
| SB602 | Open | OSC2 enabled (if occupied) |
| SB901 | Set | Internal 3.3V LDO supplies VCC33 |
Oscillators
A total of 2 oscillators can be occupied on the module:
| Part | PCB Side | Frequency | Signal Name |
| G601 | top | 66MHz | osc1 |
| G602 | top | not occupied by default | osc2 |
BTB Connectors
The Board-to-Board connectors are standard 2.54mm headers:
| Default PCB side* |
| X801 | bottom |
| X802 | bottom |
| X803 (Memory) | top |
* actually the connectors can be occupied from either side. However the default side is relevant for the pin numbering. So note that X803 is differently numbered from the other 2 connectors!
Signals
Short notes for special or dedicated signals:
Signal Name | Signal Type | Notes |
| VIN | Power | Power supply input 4.5V ... 10V are allowed here. 4.5V ... 5.5V preferred for low power dissipation. |
| VCC33 | Power | 3.3V output Depending on the FPGA code, the onboard power supply can deliver up to ~0.8A to your application board. With high I/O frequencies this available current can be lower. |
| VCCIO0 | Power | I/O voltage for FPGA bank 0 If jumpered on the module, this delivers 3.3V If not jumpered on the module, you have to connect your desired I/O voltage here for bank 0. |
| VCCIO3 | Power | I/O voltage for FPGA bank 3 If jumpered on the module, this delivers 3.3V If not jumpered on the module, you have to connect your desired I/O voltage here for bank 3. |
FPGA_IOxxx_LyyN_z FPGA_IOxxx_LyyP_z | IO | These are free I/O signals which are part of a differential pair xxx = FPGA pin number yy = differential pair number z = FPGA I/O bank number P/N = (P)ositive / (N)egative side of differential pair |
| FPGA_IOxxx_z | IO | These are free I/O signals which are not part of a differential pair xxx = FPGA pin number z = FPGA I/O bank number |
| FPGA_IPxxx_z | Input | These are free Input Only signals (which are also not part of a differential pair) xxx = FPGA pin number z = FPGA I/O bank number Pay attention to these signals! They can only act as inputs, there are no output buffers here! This is unique to Spartan-3E. |
| MEM_xxx | IO | These are FPGA I/O signals, that are also connected to the SRAM and Flash components. Therefore you can either use them as a common memory bus, or if onboard memories are disabled, as free I/Os. |
Bank I/O Voltages
The Spartan-3E has 3 I/O banks, each of which can be supplied with an I/O voltage. Banks 1 and 2 are fixed to 3.3V, banks 0 and 3 can be supplied externally from the BTB connectors or be connected to VCC33 as well through solder bridges SB301 and SB302.
Bank No. | Power Supply Signal Name | Notes |
| 0 | VCCIO0 | externally supplied or 3.3V connected to bank 0 |
| 1 | VCC33 | 3.3V fixed |
| 2 | VCC33 | 3.3V fixed |
| 3 | VCCIO3 | externally supplied or 3.3V connected to bank 3 |
Mechanical Dimensions
The major dimensions of the module are 100 x 58mm.

Technical Data
| Order Number | ZLC3E-0100 | ZLC3E-0250 |
| FPGA | Spartan3E-100 XC3S100E-4TQG144C | Spartan3E-250 XC3S250E-4TQG144C |
| Speed Grade | 4 |
| RAM | 4MBit / 8Bit SRAM |
| Flash | 32MBit / 8Bit (StrataFlash compatible) |
| FPGA Configuration Source | JTAG, Parallel Flash |
| Connectors | 3x Standard 2.54mm Headers or Receptables |
| User Interface | 4 DIP switches (incl. Mode Pins) 2 pushbuttons 3 LEDs (incl. DONE) |
| Integrated Power Supply | Input: 4...10V Output: SMPS: 1.2V/3A, LDO: 3.3V/1A, 2.5V |
| External I/Os | Free I/Os: 55 Shared with Memory Bus: 32 (*) |
| Mechanical Dimensions | 100 x 58mm |
(*) The shared external I/Os can either be used as a memory bus (together with the SRAM and Flash) or as free I/Os (if RAM/Flash are disabled).
Software and Resources
Links
All resources and software downloads for the Zefant-LC3E can be downloaded from the subversion repository. You can access the repository here:
* like Tortoise for example.
Repository Hierarchy
The most important directories of the repository will be mentioned in this incomplete list. It will pay out to browse the repository by yourself!
Directory | Description |
| trunk/Software/_common | Pin constraints files (.UCF files) for FPGA on Zefant-LC3E |
| trunk/Software/fpga_blinky | Simple blinking example |
| trunk/Docs | Schematics, mechanical drawings and other resources |
| trunk/Components | Datasheets for the onboard components |
Additional Files in external Repositories